The Q.series X I/O modules separate between standard arithmetic functions and signal conditioning arithmetic functions. Why is this?
For Q.series X I/O modules the same functions (e.g. selRMS, max, or min) can be configured as standard or as signal conditioning arithmetic variables.
The difference is that the standard arithmetic variables are calculated in the DSP and the signal conditioning arithmetic variables in the FPGA. The standard arithmetic variables calculate their result out of the copy read by the DSP from the FPGA actual value.
Standard arithmetic functions
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+
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*
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/
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min()
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max()
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selRMS(Vx; Ts) ... Ts = integration time (period of the processed signal)
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integ()
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spec1()
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spec2()
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spec3()
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spec4()
Signal conditioning arithmetic functions
These functions can be used to get intermediate results from the analog input or remote variables calculated inside the FPGA.
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min() … min value of an analog or remote input
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max() … max value of an analog or remote input
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selunb() … analog input unbalanced value (Raw)
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selgro() … gross value Gro = Raw - null
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selnet() … netto value Netto = Gro - tare
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selRMS(Vx; Ts) … Ts LP rise time (should be several periods of the processed signal)
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selmul() … multiplies 2 following analog input channels (Ain0*Ain1, Ain1*Ain2, …)
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spec1()
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spec2()
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spec3()
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spec4()